cachebench-all-results

Intel Core i7-6600U testing with a LENOVO 20FAS1EF0M (N1CET47W 1.15 BIOS) and Intel HD 520 3GB on Fedora 30 via the Phoronix Test Suite.

Compare your own system(s) to this result file with the Phoronix Test Suite by running the command: phoronix-test-suite benchmark 2006266-AS-CACHEBENC85
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Result
Identifier
Performance Per
Dollar
Date
Run
  Test
  Duration
cachebench-all-old-laptop
June 26 2020
  19 Minutes
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cachebench-all-resultsOpenBenchmarking.orgPhoronix Test SuiteIntel Core i7-6600U @ 3.40GHz (2 Cores / 4 Threads)LENOVO 20FAS1EF0M (N1CET47W 1.15 BIOS)Intel Xeon E3-1200 v5/E3-150019456MB512GB TOSHIBA THNSNJ51Intel HD 520 3GB (1050MHz)Realtek ALC293Intel I219-LM + Intel 8260Fedora 305.6.13-100.fc30.x86_64 (x86_64)GNOME Shell 3.32.2X Server4.5 Mesa 19.1.8GCC 9.3.1 20200408ext41920x1080ProcessorMotherboardChipsetMemoryDiskGraphicsAudioNetworkOSKernelDesktopDisplay ServerOpenGLCompilerFile-SystemScreen ResolutionCachebench-all-results PerformanceSystem Logs- --build=x86_64-redhat-linux --disable-libunwind-exceptions --enable-__cxa_atexit --enable-bootstrap --enable-cet --enable-checking=release --enable-gnu-indirect-function --enable-gnu-unique-object --enable-initfini-array --enable-languages=c,c++,fortran,objc,obj-c++,ada,go,d,lto --enable-multilib --enable-offload-targets=nvptx-none --enable-plugin --enable-shared --enable-threads=posix --mandir=/usr/share/man --with-arch_32=i686 --with-gcc-major-version-only --with-isl --with-linker-hash-style=gnu --with-tune=generic --without-cuda-driver - Scaling Governor: intel_pstate powersave- SELinux + itlb_multihit: KVM: Mitigation of Split huge pages + l1tf: Mitigation of PTE Inversion; VMX: conditional cache flushes SMT vulnerable + mds: Mitigation of Clear buffers; SMT vulnerable + meltdown: Mitigation of PTI + spec_store_bypass: Mitigation of SSB disabled via prctl and seccomp + spectre_v1: Mitigation of usercopy/swapgs barriers and __user pointer sanitization + spectre_v2: Mitigation of Full generic retpoline IBPB: conditional IBRS_FW STIBP: conditional RSB filling + tsx_async_abort: Mitigation of Clear buffers; SMT vulnerable

CacheBench

This is a performance test of CacheBench, which is part of LLCbench. CacheBench is designed to test the memory and cache bandwidth performance Learn more via the OpenBenchmarking.org test page.

OpenBenchmarking.orgMB/s, More Is BetterCacheBenchTest: Readcachebench-all-old-laptop6001200180024003000SE +/- 4.69, N = 32800.30MIN: 2777.96 / MAX: 2819.911. (CC) gcc options: -lrt

OpenBenchmarking.orgMB/s, More Is BetterCacheBenchTest: Writecachebench-all-old-laptop5K10K15K20K25KSE +/- 27.62, N = 323124.21MIN: 20905.32 / MAX: 24918.031. (CC) gcc options: -lrt

OpenBenchmarking.orgMB/s, More Is BetterCacheBenchTest: Read / Modify / Writecachebench-all-old-laptop3K6K9K12K15KSE +/- 72.32, N = 316269.06MIN: 15585.19 / MAX: 16747.491. (CC) gcc options: -lrt