dmesg - typec128g3
cpufreq: cpu8,cur:2063000,set:2201600,set ndiv:172
cpufreq: cpu4,cur:2043000,set:2201600,set ndiv:172
cpufreq: cpu8,cur:2326000,set:2201600,set ndiv:172
cpufreq: cpu4,cur:2323000,set:2201600,set ndiv:172
cpufreq: cpu8,cur:2363000,set:2201600,set ndiv:172
cpufreq: cpu4,cur:2050000,set:2201600,set ndiv:172
cpufreq: cpu4,cur:2469000,set:2201600,set ndiv:172
cpufreq: cpu4,cur:2355000,set:2201600,set ndiv:172
nvgpu: 17000000.ga10b nvgpu_channel_recover_from_wdt:107 [ERR] Job on channel 509 timed out
nvgpu: 17000000.ga10b nvgpu_timeout_expired_msg_cpu:94 [ERR] Timeout detected @ nvgpu_pmu_wait_fw_ack_status+0xb8/0x130 [nvgpu]
nvgpu: 17000000.ga10b nvgpu_pmu_rpc_execute:728 [ERR] PMU wait timeout expired.
nvgpu: 17000000.ga10b ga10b_pmu_pg_allow:123 [ERR] Failed to execute RPC status=0xffffff92
nvgpu: 17000000.ga10b ga10b_intr_gr_stall_isr:742 [ERR] ELPG enable failed.
nvgpu: 17000000.ga10b ga10b_intr_gr_stall_interrupt_handling:777 [ERR] Unable to handle GR STALL interrupt inst_id : 0 Vectorid : 0x000000c0 intr_id : 0x00000000 gr_instance_id : 0 engine_intr_mask : 0x1 unit_subtree_mask : 0x1
__ga10b__ NV_PGRAPH_STATUS: 0x12000a1
__ga10b__ NV_PGRAPH_STATUS1: 0x2
nvgpu: 17000000.ga10b nvgpu_cic_mon_report_err_safety_services:92 [ERR] Error reporting is not supported in this platform
__ga10b__ NV_PGRAPH_ENGINE_STATUS: 0x1
__ga10b__ NV_PGRAPH_GRFIFO_STATUS : 0xe0e0001
__ga10b__ NV_PGRAPH_GRFIFO_CONTROL : 0x10001
__ga10b__ NV_PGRAPH_PRI_FECS_HOST_INT_STATUS : 0x0
__ga10b__ NV_PGRAPH_EXCEPTION : 0x0
nvgpu: 17000000.ga10b ga10b_fifo_ctxsw_timeout_isr:277 [ERR] Host pfifo ctxsw timeout error
__ga10b__ NV_PGRAPH_FECS_INTR : 0x0
__ga10b__ NV_PFIFO_ENGINE_STATUS(GR) : 0x20002000
__ga10b__ NV_PGRAPH_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_ACTIVITY1: 0x0
__ga10b__ NV_PGRAPH_ACTIVITY4: 0x0
cpufreq: cpu0,cur:1000,set:2201600,set ndiv:172
__ga10b__ NV_PGRAPH_PRI_SKED_ACTIVITY: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY1: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY2: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY3: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY4: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY1: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY2: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY3: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY4: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_DS_MPIPE_STATUS: 0x0
__ga10b__ NV_PGRAPH_PRI_FE_GO_IDLE_TIMEOUT : 0x1800
__ga10b__ NV_PGRAPH_PRI_FE_GO_IDLE_INFO : 0x1000700
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_TEX_M_TEX_SUBUNITS_STATUS: 0x0
__ga10b__ NV_PGRAPH_PRI_CWD_FS: 0x802
__ga10b__ NV_PGRAPH_PRI_FE_TPC_FS(0): 0xff
__ga10b__ NV_PGRAPH_PRI_CWD_GPC_TPC_ID: 0x2120313
__ga10b__ NV_PGRAPH_PRI_CWD_SM_ID(0): 0x1030507
__ga10b__ NV_PGRAPH_PRI_FECS_CTXSW_STATUS_FE_0: 0x2
__ga10b__ NV_PGRAPH_PRI_FECS_CTXSW_STATUS_1: 0x190
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_STATUS_GPC_0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_STATUS_1: 0x390
__ga10b__ NV_PGRAPH_PRI_FECS_CTXSW_IDLESTATE : 0xf
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_IDLESTATE : 0xf
__ga10b__ NV_PGRAPH_PRI_FECS_CURRENT_CTX : 0xb0110e64
__ga10b__ NV_PGRAPH_PRI_FECS_NEW_CTX : 0xb0110e64
__ga10b__ NV_PGRAPH_PRI_FECS_HOST_INT_ENABLE : 0x7f0003
__ga10b__ NV_PGRAPH_PRI_FECS_HOST_INT_STATUS : 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP0_CROP_STATUS1 : 0x5f00000
__ga10b__ NV_PGRAPH_PRI_GPCS_ROPS_CROP_STATUS1 : 0x5f00000
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP0_ZROP_STATUS : 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP0_ZROP_STATUS2 : 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP1_ZROP_STATUS: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP1_ZROP_STATUS2: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROPS_ZROP_STATUS : 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROPS_ZROP_STATUS2 : 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_EXCEPTION: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_EXCEPTION_EN: 0xfc0f6004
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_EXCEPTION: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_EXCEPTION_EN: 0x16
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_BPT_PAUSE_MASK_0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_BPT_PAUSE_MASK_1: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_DBGR_STATUS0: 0x0
nvgpu: 17000000.ga10b nvgpu_set_err_notifier_locked:149 [ERR] error notifier set to 8 for ch 509
nvgpu: 17000000.ga10b nvgpu_channel_recover_from_wdt:107 [ERR] Job on channel 509 timed out
__ga10b__ NV_PGRAPH_STATUS: 0x0
__ga10b__ NV_PGRAPH_STATUS1: 0x0
__ga10b__ NV_PGRAPH_ENGINE_STATUS: 0x1
__ga10b__ NV_PGRAPH_GRFIFO_STATUS : 0xa050500
__ga10b__ NV_PGRAPH_GRFIFO_CONTROL : 0x0
__ga10b__ NV_PGRAPH_PRI_FECS_HOST_INT_STATUS : 0x0
__ga10b__ NV_PGRAPH_EXCEPTION : 0x0
__ga10b__ NV_PGRAPH_FECS_INTR : 0x0
__ga10b__ NV_PFIFO_ENGINE_STATUS(GR) : 0x80022002
__ga10b__ NV_PGRAPH_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_ACTIVITY1: 0x0
__ga10b__ NV_PGRAPH_ACTIVITY4: 0x0
__ga10b__ NV_PGRAPH_PRI_SKED_ACTIVITY: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY1: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY2: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY3: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY4: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY1: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY2: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY3: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY4: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_DS_MPIPE_STATUS: 0x0
__ga10b__ NV_PGRAPH_PRI_FE_GO_IDLE_TIMEOUT : 0x1800
__ga10b__ NV_PGRAPH_PRI_FE_GO_IDLE_INFO : 0x1000700
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_TEX_M_TEX_SUBUNITS_STATUS: 0x0
__ga10b__ NV_PGRAPH_PRI_CWD_FS: 0x802
__ga10b__ NV_PGRAPH_PRI_FE_TPC_FS(0): 0xff
__ga10b__ NV_PGRAPH_PRI_CWD_GPC_TPC_ID: 0x2120313
__ga10b__ NV_PGRAPH_PRI_CWD_SM_ID(0): 0x1030507
__ga10b__ NV_PGRAPH_PRI_FECS_CTXSW_STATUS_FE_0: 0x20002
__ga10b__ NV_PGRAPH_PRI_FECS_CTXSW_STATUS_1: 0x190
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_STATUS_GPC_0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_STATUS_1: 0x390
__ga10b__ NV_PGRAPH_PRI_FECS_CTXSW_IDLESTATE : 0xf
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_IDLESTATE : 0xf
__ga10b__ NV_PGRAPH_PRI_FECS_CURRENT_CTX : 0xb01395a3
__ga10b__ NV_PGRAPH_PRI_FECS_NEW_CTX : 0xb01395a3
__ga10b__ NV_PGRAPH_PRI_FECS_HOST_INT_ENABLE : 0x7f0003
__ga10b__ NV_PGRAPH_PRI_FECS_HOST_INT_STATUS : 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP0_CROP_STATUS1 : 0x5f00000
__ga10b__ NV_PGRAPH_PRI_GPCS_ROPS_CROP_STATUS1 : 0x5f00000
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP0_ZROP_STATUS : 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP0_ZROP_STATUS2 : 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP1_ZROP_STATUS: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP1_ZROP_STATUS2: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROPS_ZROP_STATUS : 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROPS_ZROP_STATUS2 : 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_EXCEPTION: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_EXCEPTION_EN: 0xfc0f6004
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_EXCEPTION: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_EXCEPTION_EN: 0x16
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_BPT_PAUSE_MASK_0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_BPT_PAUSE_MASK_1: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_DBGR_STATUS0: 0x0
nvgpu: 17000000.ga10b nvgpu_set_err_notifier_locked:149 [ERR] error notifier set to 8 for ch 509
__ga10b__ Channel Status - chip ga10b
__ga10b__ ---------------------------
__ga10b__ 509-ga10b, TSG: 2, pid 2625, refs: 11, deterministic: no, domain name: (default)
__ga10b__ channel status: not in use on_pbdma, on_eng, pending, pbdma_busy, eng_busy busy
__ga10b__ RAMFC: TOP: 8000001ff0a8065c PUT: 001ff0a80670 GET: 001ff0a8065c FETCH: 000000000000 HEADER: 2140006c COUNT: 11110000 SEMAPHORE: addr 002000180000 payload 00000000000118b5 execute 00081003
__ga10b__
__ga10b__ 510-ga10b, TSG: 1, pid 1814, refs: 2, deterministic: no, domain name: (default)
__ga10b__ channel status: in use idle not busy
__ga10b__ RAMFC: TOP: 8000002004033190 PUT: 002004033190 GET: 002004033190 FETCH: 000000000000 HEADER: 2140006c COUNT: 00000000 SEMAPHORE: addr 002004320000 payload 0000000000000000 execute 00000001
__ga10b__
__ga10b__ 511-ga10b, TSG: 0, pid 1814, refs: 3, deterministic: no, domain name: (default)
__ga10b__ channel status: in use idle not busy
__ga10b__ RAMFC: TOP: 8000002004058218 PUT: 002004058218 GET: 002004058218 FETCH: 000000000000 HEADER: 2140006c COUNT: 00000000 SEMAPHORE: addr 002004020000 payload 0000000000000000 execute 00100001
__ga10b__
__ga10b__ PBDMA Status - chip ga10b
__ga10b__ -------------------------
__ga10b__ pbdma 0:
__ga10b__ id: 2 - [tsg] next_id: - -1 [channel] | status: valid
__ga10b__ PBDMA_PUT 0000001ff0a80cc0 PBDMA_GET 0000001ff0a80c70
__ga10b__ GP_PUT 00000754 GP_GET 00000746 FETCH 0000074c HEADER 20060034
__ga10b__ HDR 2001c00d SHADOW0 f0a80674 SHADOW1 00064c1f
__ga10b__ pbdma 1:
__ga10b__ id: -1 - [channel] next_id: - -1 [channel] | status: invalid
__ga10b__ PBDMA_PUT 00000020046d00a0 PBDMA_GET 00000020046d00a0
__ga10b__ GP_PUT 0000000c GP_GET 0000000c FETCH 0000000c HEADER 2140006c
__ga10b__ HDR 2001001b SHADOW0 046d0078 SHADOW1 00002820
__ga10b__ pbdma 2:
__ga10b__ id: -1 - [channel] next_id: - -1 [channel] | status: invalid
__ga10b__ PBDMA_PUT 0000002004318118 PBDMA_GET 0000002004318118
__ga10b__ GP_PUT 0000001c GP_GET 0000001c FETCH 0000001c HEADER 2140006c
__ga10b__ HDR 2001001b SHADOW0 043180f0 SHADOW1 00002820
__ga10b__ pbdma 3:
__ga10b__ id: -1 - [channel] next_id: - -1 [channel] | status: invalid
__ga10b__ PBDMA_PUT 000000798d73cde4 PBDMA_GET 00000074bfcf23f0
__ga10b__ GP_PUT 00000000 GP_GET e338ba51 FETCH 00000000 HEADER 2096ebb8
__ga10b__ HDR 180b5484 SHADOW0 193851fc SHADOW1 0bd29140
__ga10b__ pbdma 4:
__ga10b__ id: -1 - [channel] next_id: - -1 [channel] | status: invalid
__ga10b__ PBDMA_PUT 0000003f0506e4a4 PBDMA_GET 00000012fe1ceec8
__ga10b__ GP_PUT 00000000 GP_GET a0558be6 FETCH 00000000 HEADER 40c61348
__ga10b__ HDR 7c25ee7b SHADOW0 6fb87dd7 SHADOW1 04c3a96e
__ga10b__ pbdma 5:
__ga10b__ id: -1 - [channel] next_id: - -1 [channel] | status: invalid
__ga10b__ PBDMA_PUT 0000002004ea8118 PBDMA_GET 0000002004ea8118
__ga10b__ GP_PUT 0000001c GP_GET 0000001c FETCH 0000001c HEADER 2140006c
__ga10b__ HDR 2001001b SHADOW0 04ea80f0 SHADOW1 00002820
__ga10b__
__ga10b__ ga10b eng 0:
__ga10b__ id: 2 (tsg), next_id: -1 (channel), ctx status: valid
__ga10b__ busy
__ga10b__
__ga10b__ ga10b eng 1:
__ga10b__ id: -1 (channel), next_id: -1 (channel), ctx status: invalid
__ga10b__
__ga10b__ ga10b eng 2:
__ga10b__ id: -1 (channel), next_id: -1 (channel), ctx status: invalid
__ga10b__
__ga10b__ ga10b eng 3:
__ga10b__ id: -1 (channel), next_id: -1 (channel), ctx status: invalid
__ga10b__
__ga10b__ ga10b eng 4:
__ga10b__ id: -1 (channel), next_id: -1 (channel), ctx status: invalid
__ga10b__
__ga10b__ ga10b eng 5:
__ga10b__ id: -1 (channel), next_id: -1 (channel), ctx status: invalid
__ga10b__
__ga10b__
nvgpu: 17000000.ga10b nvgpu_channel_recover_from_wdt:107 [ERR] Job on channel 509 timed out
__ga10b__ NV_PGRAPH_STATUS: 0x0
__ga10b__ NV_PGRAPH_STATUS1: 0x0
__ga10b__ NV_PGRAPH_ENGINE_STATUS: 0x1
__ga10b__ NV_PGRAPH_GRFIFO_STATUS : 0xe090500
__ga10b__ NV_PGRAPH_GRFIFO_CONTROL : 0x0
__ga10b__ NV_PGRAPH_PRI_FECS_HOST_INT_STATUS : 0x0
__ga10b__ NV_PGRAPH_EXCEPTION : 0x0
__ga10b__ NV_PGRAPH_FECS_INTR : 0x0
__ga10b__ NV_PFIFO_ENGINE_STATUS(GR) : 0x80022002
__ga10b__ NV_PGRAPH_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_ACTIVITY1: 0x0
__ga10b__ NV_PGRAPH_ACTIVITY4: 0x0
__ga10b__ NV_PGRAPH_PRI_SKED_ACTIVITY: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY1: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY2: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY3: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY4: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY1: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY2: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY3: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY4: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_DS_MPIPE_STATUS: 0x0
__ga10b__ NV_PGRAPH_PRI_FE_GO_IDLE_TIMEOUT : 0x1800
__ga10b__ NV_PGRAPH_PRI_FE_GO_IDLE_INFO : 0x1000700
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_TEX_M_TEX_SUBUNITS_STATUS: 0x0
__ga10b__ NV_PGRAPH_PRI_CWD_FS: 0x802
__ga10b__ NV_PGRAPH_PRI_FE_TPC_FS(0): 0xff
__ga10b__ NV_PGRAPH_PRI_CWD_GPC_TPC_ID: 0x2120313
__ga10b__ NV_PGRAPH_PRI_CWD_SM_ID(0): 0x1030507
__ga10b__ NV_PGRAPH_PRI_FECS_CTXSW_STATUS_FE_0: 0x20002
__ga10b__ NV_PGRAPH_PRI_FECS_CTXSW_STATUS_1: 0x190
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_STATUS_GPC_0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_STATUS_1: 0x390
__ga10b__ NV_PGRAPH_PRI_FECS_CTXSW_IDLESTATE : 0xf
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_IDLESTATE : 0xf
__ga10b__ NV_PGRAPH_PRI_FECS_CURRENT_CTX : 0xb01fbff2
__ga10b__ NV_PGRAPH_PRI_FECS_NEW_CTX : 0xb01fbff2
__ga10b__ NV_PGRAPH_PRI_FECS_HOST_INT_ENABLE : 0x7fffff
__ga10b__ NV_PGRAPH_PRI_FECS_HOST_INT_STATUS : 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP0_CROP_STATUS1 : 0x5f00000
__ga10b__ NV_PGRAPH_PRI_GPCS_ROPS_CROP_STATUS1 : 0x5f00000
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP0_ZROP_STATUS : 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP0_ZROP_STATUS2 : 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP1_ZROP_STATUS: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP1_ZROP_STATUS2: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROPS_ZROP_STATUS : 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROPS_ZROP_STATUS2 : 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_EXCEPTION: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_EXCEPTION_EN: 0xfc0f6004
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_EXCEPTION: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_EXCEPTION_EN: 0x16
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_BPT_PAUSE_MASK_0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_BPT_PAUSE_MASK_1: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_DBGR_STATUS0: 0x0
nvgpu: 17000000.ga10b nvgpu_set_err_notifier_locked:149 [ERR] error notifier set to 8 for ch 509
__ga10b__ Channel Status - chip ga10b
__ga10b__ ---------------------------
__ga10b__ 509-ga10b, TSG: 2, pid 2625, refs: 6, deterministic: no, domain name: (default)
__ga10b__ channel status: not in use on_pbdma, on_eng, pbdma_busy, eng_busy busy
__ga10b__ RAMFC: TOP: 8000001fc42aa664 PUT: 001fc42aa678 GET: 001fc42aa664 FETCH: 000000000000 HEADER: 2140006c COUNT: 11110000 SEMAPHORE: addr 002000180000 payload 00000000000118f5 execute 00081003
__ga10b__
__ga10b__ 510-ga10b, TSG: 1, pid 1814, refs: 2, deterministic: no, domain name: (default)
__ga10b__ channel status: in use idle not busy
__ga10b__ RAMFC: TOP: 8000002004033348 PUT: 002004033348 GET: 002004033348 FETCH: 000000000000 HEADER: 2140006c COUNT: 00000000 SEMAPHORE: addr 002004320000 payload 0000000000000000 execute 00000001
__ga10b__
__ga10b__ 511-ga10b, TSG: 0, pid 1814, refs: 189, deterministic: no, domain name: (default)
__ga10b__ channel status: in use idle not busy
__ga10b__ RAMFC: TOP: 800000200404d5e8 PUT: 00200404d5e8 GET: 00200404d5e8 FETCH: 000000000000 HEADER: 2140006c COUNT: 00000000 SEMAPHORE: addr 002004020000 payload 0000000000000000 execute 00100001
__ga10b__
__ga10b__ PBDMA Status - chip ga10b
__ga10b__ -------------------------
__ga10b__ pbdma 0:
__ga10b__ id: 2 - [tsg] next_id: - -1 [channel] | status: valid
__ga10b__ PBDMA_PUT 0000001fc42aacc8 PBDMA_GET 0000001fc42aac70
__ga10b__ GP_PUT 00000888 GP_GET 00000886 FETCH 00000888 HEADER 80060050
__ga10b__ HDR 8000c014 SHADOW0 c42aa67c SHADOW1 00064c1f
__ga10b__ pbdma 1:
__ga10b__ id: -1 - [channel] next_id: - -1 [channel] | status: invalid
__ga10b__ PBDMA_PUT 00000020046d00a0 PBDMA_GET 00000020046d00a0
__ga10b__ GP_PUT 0000000c GP_GET 0000000c FETCH 0000000c HEADER 2140006c
__ga10b__ HDR 2001001b SHADOW0 046d0078 SHADOW1 00002820
__ga10b__ pbdma 2:
__ga10b__ id: -1 - [channel] next_id: - -1 [channel] | status: invalid
__ga10b__ PBDMA_PUT 0000002004318118 PBDMA_GET 0000002004318118
__ga10b__ GP_PUT 0000001c GP_GET 0000001c FETCH 0000001c HEADER 2140006c
__ga10b__ HDR 2001001b SHADOW0 043180f0 SHADOW1 00002820
__ga10b__ pbdma 3:
__ga10b__ id: -1 - [channel] next_id: - -1 [channel] | status: invalid
__ga10b__ PBDMA_PUT 000000798d73cde4 PBDMA_GET 00000074bfcf23f0
__ga10b__ GP_PUT 00000000 GP_GET e338ba51 FETCH 00000000 HEADER 2096ebb8
__ga10b__ HDR 180b5484 SHADOW0 193851fc SHADOW1 0bd29140
__ga10b__ pbdma 4:
__ga10b__ id: -1 - [channel] next_id: - -1 [channel] | status: invalid
__ga10b__ PBDMA_PUT 0000003f0506e4a4 PBDMA_GET 00000012fe1ceec8
__ga10b__ GP_PUT 00000000 GP_GET a0558be6 FETCH 00000000 HEADER 40c61348
__ga10b__ HDR 7c25ee7b SHADOW0 6fb87dd7 SHADOW1 04c3a96e
__ga10b__ pbdma 5:
__ga10b__ id: -1 - [channel] next_id: - -1 [channel] | status: invalid
__ga10b__ PBDMA_PUT 0000002004ea8118 PBDMA_GET 0000002004ea8118
__ga10b__ GP_PUT 0000001c GP_GET 0000001c FETCH 0000001c HEADER 2140006c
__ga10b__ HDR 2001001b SHADOW0 04ea80f0 SHADOW1 00002820
__ga10b__
__ga10b__ ga10b eng 0:
__ga10b__ id: 2 (tsg), next_id: -1 (channel), ctx status: valid
__ga10b__ busy
__ga10b__
__ga10b__ ga10b eng 1:
__ga10b__ id: -1 (channel), next_id: -1 (channel), ctx status: invalid
__ga10b__
__ga10b__ ga10b eng 2:
__ga10b__ id: -1 (channel), next_id: -1 (channel), ctx status: invalid
__ga10b__
__ga10b__ ga10b eng 3:
__ga10b__ id: -1 (channel), next_id: -1 (channel), ctx status: invalid
__ga10b__
__ga10b__ ga10b eng 4:
__ga10b__ id: -1 (channel), next_id: -1 (channel), ctx status: invalid
__ga10b__
__ga10b__ ga10b eng 5:
__ga10b__ id: -1 (channel), next_id: -1 (channel), ctx status: invalid
__ga10b__
__ga10b__
nvgpu: 17000000.ga10b nvgpu_channel_recover_from_wdt:107 [ERR] Job on channel 509 timed out
__ga10b__ NV_PGRAPH_STATUS: 0x0
__ga10b__ NV_PGRAPH_STATUS1: 0x0
__ga10b__ NV_PGRAPH_ENGINE_STATUS: 0x1
__ga10b__ NV_PGRAPH_GRFIFO_STATUS : 0x110c0500
__ga10b__ NV_PGRAPH_GRFIFO_CONTROL : 0x0
__ga10b__ NV_PGRAPH_PRI_FECS_HOST_INT_STATUS : 0x0
__ga10b__ NV_PGRAPH_EXCEPTION : 0x0
__ga10b__ NV_PGRAPH_FECS_INTR : 0x0
__ga10b__ NV_PFIFO_ENGINE_STATUS(GR) : 0x80022002
__ga10b__ NV_PGRAPH_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_ACTIVITY1: 0x0
__ga10b__ NV_PGRAPH_ACTIVITY4: 0x0
__ga10b__ NV_PGRAPH_PRI_SKED_ACTIVITY: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY1: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY2: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY3: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY4: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY1: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY2: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY3: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY4: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_DS_MPIPE_STATUS: 0x0
__ga10b__ NV_PGRAPH_PRI_FE_GO_IDLE_TIMEOUT : 0x1800
__ga10b__ NV_PGRAPH_PRI_FE_GO_IDLE_INFO : 0x1000700
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_TEX_M_TEX_SUBUNITS_STATUS: 0x0
__ga10b__ NV_PGRAPH_PRI_CWD_FS: 0x802
__ga10b__ NV_PGRAPH_PRI_FE_TPC_FS(0): 0xff
__ga10b__ NV_PGRAPH_PRI_CWD_GPC_TPC_ID: 0x2120313
__ga10b__ NV_PGRAPH_PRI_CWD_SM_ID(0): 0x1030507
__ga10b__ NV_PGRAPH_PRI_FECS_CTXSW_STATUS_FE_0: 0x20002
__ga10b__ NV_PGRAPH_PRI_FECS_CTXSW_STATUS_1: 0x190
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_STATUS_GPC_0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_STATUS_1: 0x390
__ga10b__ NV_PGRAPH_PRI_FECS_CTXSW_IDLESTATE : 0xf
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_IDLESTATE : 0xf
__ga10b__ NV_PGRAPH_PRI_FECS_CURRENT_CTX : 0xb022f57c
__ga10b__ NV_PGRAPH_PRI_FECS_NEW_CTX : 0xb022f57c
__ga10b__ NV_PGRAPH_PRI_FECS_HOST_INT_ENABLE : 0x7fffff
__ga10b__ NV_PGRAPH_PRI_FECS_HOST_INT_STATUS : 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP0_CROP_STATUS1 : 0x5f00000
__ga10b__ NV_PGRAPH_PRI_GPCS_ROPS_CROP_STATUS1 : 0x5f00000
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP0_ZROP_STATUS : 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP0_ZROP_STATUS2 : 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP1_ZROP_STATUS: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP1_ZROP_STATUS2: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROPS_ZROP_STATUS : 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROPS_ZROP_STATUS2 : 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_EXCEPTION: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_EXCEPTION_EN: 0xfc0f6004
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_EXCEPTION: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_EXCEPTION_EN: 0x16
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_BPT_PAUSE_MASK_0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_BPT_PAUSE_MASK_1: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_DBGR_STATUS0: 0x0
nvgpu: 17000000.ga10b nvgpu_set_err_notifier_locked:149 [ERR] error notifier set to 8 for ch 509
nvgpu: 17000000.ga10b nvgpu_channel_recover_from_wdt:107 [ERR] Job on channel 511 timed out
__ga10b__ NV_PGRAPH_STATUS: 0x12000a1
__ga10b__ NV_PGRAPH_STATUS1: 0x2
__ga10b__ NV_PGRAPH_ENGINE_STATUS: 0x1
__ga10b__ NV_PGRAPH_GRFIFO_STATUS : 0xd0d0001
__ga10b__ NV_PGRAPH_GRFIFO_CONTROL : 0x0
__ga10b__ NV_PGRAPH_PRI_FECS_HOST_INT_STATUS : 0x0
__ga10b__ NV_PGRAPH_EXCEPTION : 0x0
__ga10b__ NV_PGRAPH_FECS_INTR : 0x0
__ga10b__ NV_PFIFO_ENGINE_STATUS(GR) : 0x8002a000
__ga10b__ NV_PGRAPH_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_ACTIVITY1: 0xa00
__ga10b__ NV_PGRAPH_ACTIVITY4: 0x18
__ga10b__ NV_PGRAPH_PRI_SKED_ACTIVITY: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY1: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY2: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY3: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY4: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY1: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY2: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY3: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY4: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_DS_MPIPE_STATUS: 0x0
__ga10b__ NV_PGRAPH_PRI_FE_GO_IDLE_TIMEOUT : 0x800
__ga10b__ NV_PGRAPH_PRI_FE_GO_IDLE_INFO : 0x1000710
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_TEX_M_TEX_SUBUNITS_STATUS: 0x0
__ga10b__ NV_PGRAPH_PRI_CWD_FS: 0x802
__ga10b__ NV_PGRAPH_PRI_FE_TPC_FS(0): 0xff
__ga10b__ NV_PGRAPH_PRI_CWD_GPC_TPC_ID: 0x2120313
__ga10b__ NV_PGRAPH_PRI_CWD_SM_ID(0): 0x1030507
__ga10b__ NV_PGRAPH_PRI_FECS_CTXSW_STATUS_FE_0: 0x22001
__ga10b__ NV_PGRAPH_PRI_FECS_CTXSW_STATUS_1: 0x190
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_STATUS_GPC_0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_STATUS_1: 0x390
__ga10b__ NV_PGRAPH_PRI_FECS_CTXSW_IDLESTATE : 0xe
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_IDLESTATE : 0xf
__ga10b__ NV_PGRAPH_PRI_FECS_CURRENT_CTX : 0xb0116598
__ga10b__ NV_PGRAPH_PRI_FECS_NEW_CTX : 0x30116598
__ga10b__ NV_PGRAPH_PRI_FECS_HOST_INT_ENABLE : 0x7fffff
__ga10b__ NV_PGRAPH_PRI_FECS_HOST_INT_STATUS : 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP0_CROP_STATUS1 : 0x5f00000
__ga10b__ NV_PGRAPH_PRI_GPCS_ROPS_CROP_STATUS1 : 0x5f00000
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP0_ZROP_STATUS : 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP0_ZROP_STATUS2 : 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP1_ZROP_STATUS: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP1_ZROP_STATUS2: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROPS_ZROP_STATUS : 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROPS_ZROP_STATUS2 : 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_EXCEPTION: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_EXCEPTION_EN: 0xfc0f6004
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_EXCEPTION: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_EXCEPTION_EN: 0x16
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_BPT_PAUSE_MASK_0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_BPT_PAUSE_MASK_1: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_DBGR_STATUS0: 0x0
nvgpu: 17000000.ga10b nvgpu_set_err_notifier_locked:149 [ERR] error notifier set to 8 for ch 511
__ga10b__ Channel Status - chip ga10b
__ga10b__ ---------------------------
__ga10b__ 509-ga10b, TSG: 4294967295, pid 2625, refs: 2, deterministic: no, domain name: (no tsg)
__ga10b__ channel status: not in use idle not busy
__ga10b__ RAMFC: TOP: 8000001fc4346b50 PUT: 001fc4347074 GET: 001fc4346b50 FETCH: 000000000000 HEADER: 20000000 COUNT: 11110000 SEMAPHORE: addr 002004010000 payload 0000000000000000 execute 00100001
__ga10b__
__ga10b__ 510-ga10b, TSG: 1, pid 1814, refs: 2, deterministic: no, domain name: (default)
__ga10b__ channel status: in use idle not busy
__ga10b__ RAMFC: TOP: 80000020040337a8 PUT: 0020040337a8 GET: 0020040337a8 FETCH: 000000000000 HEADER: 2140006c COUNT: 00000000 SEMAPHORE: addr 002004320000 payload 0000000000000000 execute 00000001
__ga10b__
__ga10b__ 511-ga10b, TSG: 0, pid 1814, refs: 5, deterministic: no, domain name: (default)
__ga10b__ channel status: not in use on_eng, pending, eng_busy busy
__ga10b__ RAMFC: TOP: 80000020040523e0 PUT: 0020040523e0 GET: 0020040523e0 FETCH: 000000000000 HEADER: 2140006c COUNT: 00000000 SEMAPHORE: addr 002004020000 payload 0000000000000000 execute 00100001
__ga10b__
__ga10b__ PBDMA Status - chip ga10b
__ga10b__ -------------------------
__ga10b__ pbdma 0:
__ga10b__ id: -1 - [channel] next_id: - -1 [channel] | status: invalid
__ga10b__ PBDMA_PUT 0000001fc4347074 PBDMA_GET 0000001fc4346b50
__ga10b__ GP_PUT 0000059e GP_GET 00000595 FETCH 0000059a HEADER 20000000
__ga10b__ HDR 00000000 SHADOW0 c4346a24 SHADOW1 0006501f
__ga10b__ pbdma 1:
__ga10b__ id: -1 - [channel] next_id: - -1 [channel] | status: invalid
__ga10b__ PBDMA_PUT 00000020046d00a0 PBDMA_GET 00000020046d00a0
__ga10b__ GP_PUT 0000000c GP_GET 0000000c FETCH 0000000c HEADER 2140006c
__ga10b__ HDR 2001001b SHADOW0 046d0078 SHADOW1 00002820
__ga10b__ pbdma 2:
__ga10b__ id: -1 - [channel] next_id: - -1 [channel] | status: invalid
__ga10b__ PBDMA_PUT 0000002004318118 PBDMA_GET 0000002004318118
__ga10b__ GP_PUT 0000001c GP_GET 0000001c FETCH 0000001c HEADER 2140006c
__ga10b__ HDR 2001001b SHADOW0 043180f0 SHADOW1 00002820
__ga10b__ pbdma 3:
__ga10b__ id: -1 - [channel] next_id: - -1 [channel] | status: invalid
__ga10b__ PBDMA_PUT 000000798d73cde4 PBDMA_GET 00000074bfcf23f0
__ga10b__ GP_PUT 00000000 GP_GET e338ba51 FETCH 00000000 HEADER 2096ebb8
__ga10b__ HDR 180b5484 SHADOW0 193851fc SHADOW1 0bd29140
__ga10b__ pbdma 4:
__ga10b__ id: -1 - [channel] next_id: - -1 [channel] | status: invalid
__ga10b__ PBDMA_PUT 0000003f0506e4a4 PBDMA_GET 00000012fe1ceec8
__ga10b__ GP_PUT 00000000 GP_GET a0558be6 FETCH 00000000 HEADER 40c61348
__ga10b__ HDR 7c25ee7b SHADOW0 6fb87dd7 SHADOW1 04c3a96e
__ga10b__ pbdma 5:
__ga10b__ id: -1 - [channel] next_id: - -1 [channel] | status: invalid
__ga10b__ PBDMA_PUT 0000002004ea8118 PBDMA_GET 0000002004ea8118
__ga10b__ GP_PUT 0000001c GP_GET 0000001c FETCH 0000001c HEADER 2140006c
__ga10b__ HDR 2001001b SHADOW0 04ea80f0 SHADOW1 00002820
__ga10b__
__ga10b__ ga10b eng 0:
__ga10b__ id: 0 (tsg), next_id: -1 (channel), ctx status: load
__ga10b__ busy
__ga10b__
__ga10b__ ga10b eng 1:
__ga10b__ id: -1 (channel), next_id: -1 (channel), ctx status: invalid
__ga10b__
__ga10b__ ga10b eng 2:
__ga10b__ id: -1 (channel), next_id: -1 (channel), ctx status: invalid
__ga10b__
__ga10b__ ga10b eng 3:
__ga10b__ id: -1 (channel), next_id: -1 (channel), ctx status: invalid
__ga10b__
__ga10b__ ga10b eng 4:
__ga10b__ id: -1 (channel), next_id: -1 (channel), ctx status: invalid
__ga10b__
__ga10b__ ga10b eng 5:
__ga10b__ id: -1 (channel), next_id: -1 (channel), ctx status: invalid
__ga10b__
__ga10b__
nvgpu: 17000000.ga10b nvgpu_cic_mon_report_err_safety_services:55 [ERR] Error reporting is not supported in this platform
nvgpu: 17000000.ga10b ga10b_fifo_ctxsw_timeout_isr:277 [ERR] Host pfifo ctxsw timeout error
nvgpu: 17000000.ga10b nvgpu_channel_recover_from_wdt:107 [ERR] Job on channel 509 timed out
__ga10b__ NV_PGRAPH_STATUS: 0x0
__ga10b__ NV_PGRAPH_STATUS1: 0x0
__ga10b__ NV_PGRAPH_ENGINE_STATUS: 0x1
__ga10b__ NV_PGRAPH_GRFIFO_STATUS : 0xa040600
__ga10b__ NV_PGRAPH_GRFIFO_CONTROL : 0x0
__ga10b__ NV_PGRAPH_PRI_FECS_HOST_INT_STATUS : 0x0
__ga10b__ NV_PGRAPH_EXCEPTION : 0x0
__ga10b__ NV_PGRAPH_FECS_INTR : 0x0
__ga10b__ NV_PFIFO_ENGINE_STATUS(GR) : 0x80022002
__ga10b__ NV_PGRAPH_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_ACTIVITY1: 0x0
__ga10b__ NV_PGRAPH_ACTIVITY4: 0x0
__ga10b__ NV_PGRAPH_PRI_SKED_ACTIVITY: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY1: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY2: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY3: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY4: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY1: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY2: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY3: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY4: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_DS_MPIPE_STATUS: 0x0
__ga10b__ NV_PGRAPH_PRI_FE_GO_IDLE_TIMEOUT : 0x1800
__ga10b__ NV_PGRAPH_PRI_FE_GO_IDLE_INFO : 0x1000700
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_TEX_M_TEX_SUBUNITS_STATUS: 0x0
__ga10b__ NV_PGRAPH_PRI_CWD_FS: 0x802
__ga10b__ NV_PGRAPH_PRI_FE_TPC_FS(0): 0xff
__ga10b__ NV_PGRAPH_PRI_CWD_GPC_TPC_ID: 0x2120313
__ga10b__ NV_PGRAPH_PRI_CWD_SM_ID(0): 0x1030507
__ga10b__ NV_PGRAPH_PRI_FECS_CTXSW_STATUS_FE_0: 0x22001
__ga10b__ NV_PGRAPH_PRI_FECS_CTXSW_STATUS_1: 0x190
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_STATUS_GPC_0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_STATUS_1: 0x390
__ga10b__ NV_PGRAPH_PRI_FECS_CTXSW_IDLESTATE : 0xe
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_IDLESTATE : 0xf
__ga10b__ NV_PGRAPH_PRI_FECS_CURRENT_CTX : 0xb01fde52
__ga10b__ NV_PGRAPH_PRI_FECS_NEW_CTX : 0x301fde52
__ga10b__ NV_PGRAPH_PRI_FECS_HOST_INT_ENABLE : 0x7fffff
__ga10b__ NV_PGRAPH_PRI_FECS_HOST_INT_STATUS : 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP0_CROP_STATUS1 : 0x5f00000
__ga10b__ NV_PGRAPH_PRI_GPCS_ROPS_CROP_STATUS1 : 0x5f00000
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP0_ZROP_STATUS : 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP0_ZROP_STATUS2 : 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP1_ZROP_STATUS: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP1_ZROP_STATUS2: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROPS_ZROP_STATUS : 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROPS_ZROP_STATUS2 : 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_EXCEPTION: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_EXCEPTION_EN: 0xfc0f6004
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_EXCEPTION: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_EXCEPTION_EN: 0x16
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_BPT_PAUSE_MASK_0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_BPT_PAUSE_MASK_1: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_DBGR_STATUS0: 0x0
nvgpu: 17000000.ga10b nvgpu_set_err_notifier_locked:149 [ERR] error notifier set to 8 for ch 509
__ga10b__ Channel Status - chip ga10b
__ga10b__ ---------------------------
__ga10b__ 509-ga10b, TSG: 2, pid 2625, refs: 12, deterministic: no, domain name: (default)
__ga10b__ channel status: not in use on_eng, pending, eng_busy busy
__ga10b__ RAMFC: TOP: 8000001ff2826760 PUT: 001ff28267b0 GET: 001ff2826760 FETCH: 000000000000 HEADER: 20060034 COUNT: 11110000 SEMAPHORE: addr 001ffe17e560 payload 000000000000004c execute 02000001
__ga10b__
__ga10b__ 510-ga10b, TSG: 1, pid 1814, refs: 2, deterministic: no, domain name: (default)
__ga10b__ channel status: in use idle not busy
__ga10b__ RAMFC: TOP: 8000002004033960 PUT: 002004033960 GET: 002004033960 FETCH: 000000000000 HEADER: 2140006c COUNT: 00000000 SEMAPHORE: addr 002004320000 payload 0000000000000000 execute 00000001
__ga10b__
__ga10b__ 511-ga10b, TSG: 0, pid 1814, refs: 288, deterministic: no, domain name: (default)
__ga10b__ channel status: in use on_pbdma, on_eng, pbdma_busy, eng_busy busy
__ga10b__ RAMFC: TOP: 8000001ffc171028 PUT: 001ffc171268 GET: 001ffc171028 FETCH: 000000000000 HEADER: 2140006c COUNT: 11110000 SEMAPHORE: addr 002004020000 payload 0000000000000000 execute 00100001
__ga10b__
__ga10b__ PBDMA Status - chip ga10b
__ga10b__ -------------------------
__ga10b__ pbdma 0:
__ga10b__ id: 0 - [tsg] next_id: - -1 [channel] | status: valid
__ga10b__ PBDMA_PUT 0000001ffc171268 PBDMA_GET 0000001ffc171028
__ga10b__ GP_PUT 00002f5d GP_GET 00002ed1 FETCH 00002f50 HEADER 2140006c
__ga10b__ HDR 2001001b SHADOW0 f2826164 SHADOW1 00064c1f
__ga10b__ pbdma 1:
__ga10b__ id: -1 - [channel] next_id: - -1 [channel] | status: invalid
__ga10b__ PBDMA_PUT 00000020046d00a0 PBDMA_GET 00000020046d00a0
__ga10b__ GP_PUT 0000000c GP_GET 0000000c FETCH 0000000c HEADER 2140006c
__ga10b__ HDR 2001001b SHADOW0 046d0078 SHADOW1 00002820
__ga10b__ pbdma 2:
__ga10b__ id: -1 - [channel] next_id: - -1 [channel] | status: invalid
__ga10b__ PBDMA_PUT 0000002004318118 PBDMA_GET 0000002004318118
__ga10b__ GP_PUT 0000001c GP_GET 0000001c FETCH 0000001c HEADER 2140006c
__ga10b__ HDR 2001001b SHADOW0 043180f0 SHADOW1 00002820
__ga10b__ pbdma 3:
__ga10b__ id: -1 - [channel] next_id: - -1 [channel] | status: invalid
__ga10b__ PBDMA_PUT 000000798d73cde4 PBDMA_GET 00000074bfcf23f0
__ga10b__ GP_PUT 00000000 GP_GET e338ba51 FETCH 00000000 HEADER 2096ebb8
__ga10b__ HDR 180b5484 SHADOW0 193851fc SHADOW1 0bd29140
__ga10b__ pbdma 4:
__ga10b__ id: -1 - [channel] next_id: - -1 [channel] | status: invalid
__ga10b__ PBDMA_PUT 0000003f0506e4a4 PBDMA_GET 00000012fe1ceec8
__ga10b__ GP_PUT 00000000 GP_GET a0558be6 FETCH 00000000 HEADER 40c61348
__ga10b__ HDR 7c25ee7b SHADOW0 6fb87dd7 SHADOW1 04c3a96e
__ga10b__ pbdma 5:
__ga10b__ id: -1 - [channel] next_id: - -1 [channel] | status: invalid
__ga10b__ PBDMA_PUT 0000002004ea8118 PBDMA_GET 0000002004ea8118
__ga10b__ GP_PUT 0000001c GP_GET 0000001c FETCH 0000001c HEADER 2140006c
__ga10b__ HDR 2001001b SHADOW0 04ea80f0 SHADOW1 00002820
__ga10b__
__ga10b__ ga10b eng 0:
__ga10b__ id: 2 (tsg), next_id: 0 (tsg), ctx status: switch
__ga10b__ busy
__ga10b__
__ga10b__ ga10b eng 1:
__ga10b__ id: 0 (tsg), next_id: -1 (channel), ctx status: valid
__ga10b__
__ga10b__ ga10b eng 2:
__ga10b__ id: -1 (channel), next_id: -1 (channel), ctx status: invalid
__ga10b__
__ga10b__ ga10b eng 3:
__ga10b__ id: -1 (channel), next_id: -1 (channel), ctx status: invalid
__ga10b__
__ga10b__ ga10b eng 4:
__ga10b__ id: -1 (channel), next_id: -1 (channel), ctx status: invalid
__ga10b__
__ga10b__ ga10b eng 5:
__ga10b__ id: -1 (channel), next_id: -1 (channel), ctx status: invalid
__ga10b__
__ga10b__
nvgpu: 17000000.ga10b nvgpu_channel_recover_from_wdt:107 [ERR] Job on channel 511 timed out
__ga10b__ NV_PGRAPH_STATUS: 0x1200021
__ga10b__ NV_PGRAPH_STATUS1: 0x2
__ga10b__ NV_PGRAPH_ENGINE_STATUS: 0x1
__ga10b__ NV_PGRAPH_GRFIFO_STATUS : 0x13130001
__ga10b__ NV_PGRAPH_GRFIFO_CONTROL : 0x0
__ga10b__ NV_PGRAPH_PRI_FECS_HOST_INT_STATUS : 0x0
__ga10b__ NV_PGRAPH_EXCEPTION : 0x0
__ga10b__ NV_PGRAPH_FECS_INTR : 0x0
__ga10b__ NV_PFIFO_ENGINE_STATUS(GR) : 0x80002000
__ga10b__ NV_PGRAPH_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_ACTIVITY1: 0xa00
__ga10b__ NV_PGRAPH_ACTIVITY4: 0x18
__ga10b__ NV_PGRAPH_PRI_SKED_ACTIVITY: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY1: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY2: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY3: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY4: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY1: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY2: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY3: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY4: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_DS_MPIPE_STATUS: 0x0
__ga10b__ NV_PGRAPH_PRI_FE_GO_IDLE_TIMEOUT : 0x800
__ga10b__ NV_PGRAPH_PRI_FE_GO_IDLE_INFO : 0x1000710
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_TEX_M_TEX_SUBUNITS_STATUS: 0x0
__ga10b__ NV_PGRAPH_PRI_CWD_FS: 0x802
__ga10b__ NV_PGRAPH_PRI_FE_TPC_FS(0): 0xff
__ga10b__ NV_PGRAPH_PRI_CWD_GPC_TPC_ID: 0x2120313
__ga10b__ NV_PGRAPH_PRI_CWD_SM_ID(0): 0x1030507
__ga10b__ NV_PGRAPH_PRI_FECS_CTXSW_STATUS_FE_0: 0x20002
__ga10b__ NV_PGRAPH_PRI_FECS_CTXSW_STATUS_1: 0x190
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_STATUS_GPC_0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_STATUS_1: 0x390
__ga10b__ NV_PGRAPH_PRI_FECS_CTXSW_IDLESTATE : 0xf
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_IDLESTATE : 0xf
__ga10b__ NV_PGRAPH_PRI_FECS_CURRENT_CTX : 0xb0116757
__ga10b__ NV_PGRAPH_PRI_FECS_NEW_CTX : 0xb0116757
__ga10b__ NV_PGRAPH_PRI_FECS_HOST_INT_ENABLE : 0x7fffff
__ga10b__ NV_PGRAPH_PRI_FECS_HOST_INT_STATUS : 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP0_CROP_STATUS1 : 0x5f00000
__ga10b__ NV_PGRAPH_PRI_GPCS_ROPS_CROP_STATUS1 : 0x5f00000
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP0_ZROP_STATUS : 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP0_ZROP_STATUS2 : 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP1_ZROP_STATUS: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP1_ZROP_STATUS2: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROPS_ZROP_STATUS : 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROPS_ZROP_STATUS2 : 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_EXCEPTION: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_EXCEPTION_EN: 0xfc0f6004
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_EXCEPTION: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_EXCEPTION_EN: 0x16
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_BPT_PAUSE_MASK_0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_BPT_PAUSE_MASK_1: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_DBGR_CONTROL0: 0x1c00
nvgpu: 17000000.ga10b nvgpu_cic_mon_report_err_safety_services:55 [ERR] Error reporting is not supported in this platform
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_DBGR_STATUS0: 0x0
nvgpu: 17000000.ga10b nvgpu_set_err_notifier_locked:149 [ERR] error notifier set to 8 for ch 511
__ga10b__ Channel Status - chip ga10b
__ga10b__ ---------------------------
__ga10b__ 509-ga10b, TSG: 4294967295, pid 2625, refs: 2, deterministic: no, domain name: (no tsg)
__ga10b__ channel status: not in use idle not busy
__ga10b__ RAMFC: TOP: 8000001ff2826760 PUT: 001ff28267b0 GET: 001ff2826760 FETCH: 000000000000 HEADER: 20060034 COUNT: 11110000 SEMAPHORE: addr 001ffe17e560 payload 000000000000004c execute 02000001
__ga10b__
__ga10b__ 510-ga10b, TSG: 1, pid 1814, refs: 2, deterministic: no, domain name: (default)
__ga10b__ channel status: in use idle not busy
__ga10b__ RAMFC: TOP: 8000002004033960 PUT: 002004033960 GET: 002004033960 FETCH: 000000000000 HEADER: 2140006c COUNT: 00000000 SEMAPHORE: addr 002004320000 payload 0000000000000000 execute 00000001
__ga10b__
__ga10b__ 511-ga10b, TSG: 0, pid 1814, refs: 5, deterministic: no, domain name: (default)
__ga10b__ channel status: not in use idle not busy
__ga10b__ RAMFC: TOP: 800000200401cd18 PUT: 00200401cd18 GET: 00200401cd18 FETCH: 000000000000 HEADER: 2140006c COUNT: 00000000 SEMAPHORE: addr 002004020000 payload 0000000000000000 execute 00100001
__ga10b__
__ga10b__ PBDMA Status - chip ga10b
__ga10b__ -------------------------
__ga10b__ pbdma 0:
__ga10b__ id: -1 - [channel] next_id: - -1 [channel] | status: invalid
__ga10b__ PBDMA_PUT 000000200401cd18 PBDMA_GET 000000200401cd18
__ga10b__ GP_PUT 00002f5d GP_GET 00002f5d FETCH 00002f5d HEADER 2140006c
__ga10b__ HDR 2001001b SHADOW0 0401ccf0 SHADOW1 00002820
__ga10b__ pbdma 1:
__ga10b__ id: -1 - [channel] next_id: - -1 [channel] | status: invalid
__ga10b__ PBDMA_PUT 00000020046d00a0 PBDMA_GET 00000020046d00a0
__ga10b__ GP_PUT 0000000c GP_GET 0000000c FETCH 0000000c HEADER 2140006c
__ga10b__ HDR 2001001b SHADOW0 046d0078 SHADOW1 00002820
__ga10b__ pbdma 2:
__ga10b__ id: -1 - [channel] next_id: - -1 [channel] | status: invalid
__ga10b__ PBDMA_PUT 0000002004318118 PBDMA_GET 0000002004318118
__ga10b__ GP_PUT 0000001c GP_GET 0000001c FETCH 0000001c HEADER 2140006c
__ga10b__ HDR 2001001b SHADOW0 043180f0 SHADOW1 00002820
__ga10b__ pbdma 3:
__ga10b__ id: -1 - [channel] next_id: - -1 [channel] | status: invalid
__ga10b__ PBDMA_PUT 000000798d73cde4 PBDMA_GET 00000074bfcf23f0
__ga10b__ GP_PUT 00000000 GP_GET e338ba51 FETCH 00000000 HEADER 2096ebb8
__ga10b__ HDR 180b5484 SHADOW0 193851fc SHADOW1 0bd29140
__ga10b__ pbdma 4:
__ga10b__ id: -1 - [channel] next_id: - -1 [channel] | status: invalid
__ga10b__ PBDMA_PUT 0000003f0506e4a4 PBDMA_GET 00000012fe1ceec8
nvgpu: 17000000.ga10b ga10b_fifo_ctxsw_timeout_isr:277 [ERR] Host pfifo ctxsw timeout error
__ga10b__ GP_PUT 00000000 GP_GET a0558be6 FETCH 00000000 HEADER 40c61348
__ga10b__ HDR 7c25ee7b SHADOW0 6fb87dd7 SHADOW1 04c3a96e
__ga10b__ pbdma 5:
__ga10b__ id: -1 - [channel] next_id: - -1 [channel] | status: invalid
__ga10b__ PBDMA_PUT 0000002004ea8118 PBDMA_GET 0000002004ea8118
__ga10b__ GP_PUT 0000001c GP_GET 0000001c FETCH 0000001c HEADER 2140006c
__ga10b__ HDR 2001001b SHADOW0 04ea80f0 SHADOW1 00002820
__ga10b__
__ga10b__ ga10b eng 0:
__ga10b__ id: -1 (channel), next_id: -1 (channel), ctx status: invalid
__ga10b__
__ga10b__ ga10b eng 1:
__ga10b__ id: -1 (channel), next_id: -1 (channel), ctx status: invalid
__ga10b__
__ga10b__ ga10b eng 2:
__ga10b__ id: -1 (channel), next_id: -1 (channel), ctx status: invalid
__ga10b__
__ga10b__ ga10b eng 3:
__ga10b__ id: -1 (channel), next_id: -1 (channel), ctx status: invalid
__ga10b__
__ga10b__ ga10b eng 4:
__ga10b__ id: -1 (channel), next_id: -1 (channel), ctx status: invalid
__ga10b__
__ga10b__ ga10b eng 5:
__ga10b__ id: -1 (channel), next_id: -1 (channel), ctx status: invalid
__ga10b__
__ga10b__
nvgpu: 17000000.ga10b nvgpu_channel_recover_from_wdt:107 [ERR] Job on channel 509 timed out
__ga10b__ NV_PGRAPH_STATUS: 0x0
__ga10b__ NV_PGRAPH_STATUS1: 0x0
__ga10b__ NV_PGRAPH_ENGINE_STATUS: 0x1
__ga10b__ NV_PGRAPH_GRFIFO_STATUS : 0x6010500
__ga10b__ NV_PGRAPH_GRFIFO_CONTROL : 0x0
__ga10b__ NV_PGRAPH_PRI_FECS_HOST_INT_STATUS : 0x0
__ga10b__ NV_PGRAPH_EXCEPTION : 0x0
__ga10b__ NV_PGRAPH_FECS_INTR : 0x0
__ga10b__ NV_PFIFO_ENGINE_STATUS(GR) : 0x80022002
__ga10b__ NV_PGRAPH_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_ACTIVITY1: 0x0
__ga10b__ NV_PGRAPH_ACTIVITY4: 0x0
__ga10b__ NV_PGRAPH_PRI_SKED_ACTIVITY: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY1: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY2: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY3: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY4: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY1: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY2: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY3: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY4: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_DS_MPIPE_STATUS: 0x0
__ga10b__ NV_PGRAPH_PRI_FE_GO_IDLE_TIMEOUT : 0x1800
__ga10b__ NV_PGRAPH_PRI_FE_GO_IDLE_INFO : 0x1000700
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_TEX_M_TEX_SUBUNITS_STATUS: 0x0
__ga10b__ NV_PGRAPH_PRI_CWD_FS: 0x802
__ga10b__ NV_PGRAPH_PRI_FE_TPC_FS(0): 0xff
__ga10b__ NV_PGRAPH_PRI_CWD_GPC_TPC_ID: 0x2120313
__ga10b__ NV_PGRAPH_PRI_CWD_SM_ID(0): 0x1030507
__ga10b__ NV_PGRAPH_PRI_FECS_CTXSW_STATUS_FE_0: 0x20002
__ga10b__ NV_PGRAPH_PRI_FECS_CTXSW_STATUS_1: 0x190
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_STATUS_GPC_0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_STATUS_1: 0x390
__ga10b__ NV_PGRAPH_PRI_FECS_CTXSW_IDLESTATE : 0xf
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_IDLESTATE : 0xf
__ga10b__ NV_PGRAPH_PRI_FECS_CURRENT_CTX : 0xb01cafb1
__ga10b__ NV_PGRAPH_PRI_FECS_NEW_CTX : 0xb01cafb1
__ga10b__ NV_PGRAPH_PRI_FECS_HOST_INT_ENABLE : 0x7fffff
__ga10b__ NV_PGRAPH_PRI_FECS_HOST_INT_STATUS : 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP0_CROP_STATUS1 : 0x5f00000
__ga10b__ NV_PGRAPH_PRI_GPCS_ROPS_CROP_STATUS1 : 0x5f00000
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP0_ZROP_STATUS : 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP0_ZROP_STATUS2 : 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP1_ZROP_STATUS: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP1_ZROP_STATUS2: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROPS_ZROP_STATUS : 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROPS_ZROP_STATUS2 : 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_EXCEPTION: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_EXCEPTION_EN: 0xfc0f6004
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_EXCEPTION: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_EXCEPTION_EN: 0x16
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_BPT_PAUSE_MASK_0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_BPT_PAUSE_MASK_1: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_HWW_WARP_ESR_REPORT_MASK: 0xe812b60
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x1174
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_DBGR_STATUS0: 0x0
nvgpu: 17000000.ga10b nvgpu_set_err_notifier_locked:149 [ERR] error notifier set to 8 for ch 509
nvgpu: 17000000.ga10b nvgpu_channel_recover_from_wdt:107 [ERR] Job on channel 511 timed out
__ga10b__ NV_PGRAPH_STATUS: 0x12000a1
__ga10b__ NV_PGRAPH_STATUS1: 0x2
__ga10b__ NV_PGRAPH_ENGINE_STATUS: 0x1
__ga10b__ NV_PGRAPH_GRFIFO_STATUS : 0xb0b0001
__ga10b__ NV_PGRAPH_GRFIFO_CONTROL : 0x0
__ga10b__ NV_PGRAPH_PRI_FECS_HOST_INT_STATUS : 0x0
__ga10b__ NV_PGRAPH_EXCEPTION : 0x0
__ga10b__ NV_PGRAPH_FECS_INTR : 0x0
__ga10b__ NV_PFIFO_ENGINE_STATUS(GR) : 0x8002a000
__ga10b__ NV_PGRAPH_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_ACTIVITY1: 0xa00
__ga10b__ NV_PGRAPH_ACTIVITY4: 0x18
__ga10b__ NV_PGRAPH_PRI_SKED_ACTIVITY: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY1: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY2: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY3: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_ACTIVITY4: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY1: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY2: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY3: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_GPCCS_GPC_ACTIVITY4: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_TPCCS_TPC_ACTIVITY0: 0x0
__ga10b__ NV_PGRAPH_PRI_DS_MPIPE_STATUS: 0x0
__ga10b__ NV_PGRAPH_PRI_FE_GO_IDLE_TIMEOUT : 0x800
__ga10b__ NV_PGRAPH_PRI_FE_GO_IDLE_INFO : 0x1000710
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_TEX_M_TEX_SUBUNITS_STATUS: 0x0
__ga10b__ NV_PGRAPH_PRI_CWD_FS: 0x802
__ga10b__ NV_PGRAPH_PRI_FE_TPC_FS(0): 0xff
__ga10b__ NV_PGRAPH_PRI_CWD_GPC_TPC_ID: 0x2120313
__ga10b__ NV_PGRAPH_PRI_CWD_SM_ID(0): 0x1030507
__ga10b__ NV_PGRAPH_PRI_FECS_CTXSW_STATUS_FE_0: 0x22001
__ga10b__ NV_PGRAPH_PRI_FECS_CTXSW_STATUS_1: 0x190
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_STATUS_GPC_0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_STATUS_1: 0x390
__ga10b__ NV_PGRAPH_PRI_FECS_CTXSW_IDLESTATE : 0xe
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_CTXSW_IDLESTATE : 0xf
__ga10b__ NV_PGRAPH_PRI_FECS_CURRENT_CTX : 0xb0256bf7
__ga10b__ NV_PGRAPH_PRI_FECS_NEW_CTX : 0x30256bf7
__ga10b__ NV_PGRAPH_PRI_FECS_HOST_INT_ENABLE : 0x7fffff
__ga10b__ NV_PGRAPH_PRI_FECS_HOST_INT_STATUS : 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP0_CROP_STATUS1 : 0x5f00000
__ga10b__ NV_PGRAPH_PRI_GPCS_ROPS_CROP_STATUS1 : 0x5f00000
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP0_ZROP_STATUS : 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP0_ZROP_STATUS2 : 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP1_ZROP_STATUS: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROP1_ZROP_STATUS2: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROPS_ZROP_STATUS : 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_ROPS_ZROP_STATUS2 : 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_EXCEPTION: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_GPCCS_GPC_EXCEPTION_EN: 0xfc0f6004
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_EXCEPTION: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_TPCCS_TPC_EXCEPTION_EN: 0x16
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_BPT_PAUSE_MASK_0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPCS_TPCS_SMS_DBGR_BPT_PAUSE_MASK_1: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC0_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC1_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC2_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC0_TPC3_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC0_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC1_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC2_SM1_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM0_DBGR_STATUS0: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_HWW_WARP_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_HWW_WARP_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_HWW_GLOBAL_ESR: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_HWW_GLOBAL_ESR_REPORT_MASK: 0x0
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_DBGR_CONTROL0: 0x1c00
__ga10b__ NV_PGRAPH_PRI_GPC1_TPC3_SM1_DBGR_STATUS0: 0x0
nvgpu: 17000000.ga10b nvgpu_set_err_notifier_locked:149 [ERR] error notifier set to 8 for ch 511
__ga10b__ Channel Status - chip ga10b
__ga10b__ ---------------------------
__ga10b__ 509-ga10b, TSG: 4294967295, pid 2625, refs: 2, deterministic: no, domain name: (no tsg)
__ga10b__ channel status: not in use idle not busy
__ga10b__ RAMFC: TOP: 8000001ff28a7280 PUT: 001ff28a7338 GET: 001ff28a7280 FETCH: 000000000000 HEADER: 20030100 COUNT: 11110001 SEMAPHORE: addr 001ffe17dfe0 payload 000000000000003f execute 02000001
__ga10b__
__ga10b__ 510-ga10b, TSG: 1, pid 1814, refs: 2, deterministic: no, domain name: (default)
__ga10b__ channel status: in use idle not busy
__ga10b__ RAMFC: TOP: 8000002004033b18 PUT: 002004033b18 GET: 002004033b18 FETCH: 000000000000 HEADER: 2140006c COUNT: 00000000 SEMAPHORE: addr 002004320000 payload 0000000000000000 execute 00000001
__ga10b__
__ga10b__ 511-ga10b, TSG: 0, pid 1814, refs: 5, deterministic: no, domain name: (default)
__ga10b__ channel status: not in use on_eng, pending, eng_busy busy
__ga10b__ RAMFC: TOP: 8000002004316aa8 PUT: 002004316aa8 GET: 002004316aa8 FETCH: 000000000000 HEADER: 2140006c COUNT: 00000000 SEMAPHORE: addr 002004020000 payload 0000000000000000 execute 00100001
__ga10b__
__ga10b__ PBDMA Status - chip ga10b
__ga10b__ -------------------------
__ga10b__ pbdma 0:
__ga10b__ id: -1 - [channel] next_id: - -1 [channel] | status: invalid
__ga10b__ PBDMA_PUT 0000001ff28a7338 PBDMA_GET 0000001ff28a7280
__ga10b__ GP_PUT 000008a1 GP_GET 0000089a FETCH 000008a0 HEADER 20030100
__ga10b__ HDR 20016040 SHADOW0 f28a6cec SHADOW1 00064c1f
__ga10b__ pbdma 1:
__ga10b__ id: -1 - [channel] next_id: - -1 [channel] | status: invalid
__ga10b__ PBDMA_PUT 00000020046d00a0 PBDMA_GET 00000020046d00a0
__ga10b__ GP_PUT 0000000c GP_GET 0000000c FETCH 0000000c HEADER 2140006c
__ga10b__ HDR 2001001b SHADOW0 046d0078 SHADOW1 00002820
__ga10b__ pbdma 2:
__ga10b__ id: -1 - [channel] next_id: - -1 [channel] | status: invalid
__ga10b__ PBDMA_PUT 0000002004318118 PBDMA_GET 0000002004318118
__ga10b__ GP_PUT 0000001c GP_GET 0000001c FETCH 0000001c HEADER 2140006c
__ga10b__ HDR 2001001b SHADOW0 043180f0 SHADOW1 00002820
__ga10b__ pbdma 3:
__ga10b__ id: -1 - [channel] next_id: - -1 [channel] | status: invalid
__ga10b__ PBDMA_PUT 000000798d73cde4 PBDMA_GET 00000074bfcf23f0
__ga10b__ GP_PUT 00000000 GP_GET e338ba51 FETCH 00000000 HEADER 2096ebb8
__ga10b__ HDR 180b5484 SHADOW0 193851fc SHADOW1 0bd29140
__ga10b__ pbdma 4:
__ga10b__ id: -1 - [channel] next_id: - -1 [channel] | status: invalid
__ga10b__ PBDMA_PUT 0000003f0506e4a4 PBDMA_GET 00000012fe1ceec8
__ga10b__ GP_PUT 00000000 GP_GET a0558be6 FETCH 00000000 HEADER 40c61348
__ga10b__ HDR 7c25ee7b SHADOW0 6fb87dd7 SHADOW1 04c3a96e
__ga10b__ pbdma 5:
__ga10b__ id: -1 - [channel] next_id: - -1 [channel] | status: invalid
__ga10b__ PBDMA_PUT 0000002004ea8118 PBDMA_GET 0000002004ea8118
__ga10b__ GP_PUT 0000001c GP_GET 0000001c FETCH 0000001c HEADER 2140006c
__ga10b__ HDR 2001001b SHADOW0 04ea80f0 SHADOW1 00002820
__ga10b__
__ga10b__ ga10b eng 0:
__ga10b__ id: 0 (tsg), next_id: -1 (channel), ctx status: load
__ga10b__ busy
__ga10b__
__ga10b__ ga10b eng 1:
__ga10b__ id: -1 (channel), next_id: -1 (channel), ctx status: invalid
__ga10b__
__ga10b__ ga10b eng 2:
__ga10b__ id: -1 (channel), next_id: -1 (channel), ctx status: invalid
__ga10b__
__ga10b__ ga10b eng 3:
__ga10b__ id: -1 (channel), next_id: -1 (channel), ctx status: invalid
__ga10b__
__ga10b__ ga10b eng 4:
__ga10b__ id: -1 (channel), next_id: -1 (channel), ctx status: invalid
__ga10b__
__ga10b__ ga10b eng 5:
__ga10b__ id: -1 (channel), next_id: -1 (channel), ctx status: invalid
__ga10b__
__ga10b__
nvgpu: 17000000.ga10b nvgpu_cic_mon_report_err_safety_services:55 [ERR] Error reporting is not supported in this platform
nvgpu: 17000000.ga10b ga10b_fifo_ctxsw_timeout_isr:277 [ERR] Host pfifo ctxsw timeout error