primesieve_test

Intel Core i5-7200U testing with a Acer Lynx_SK (V1.19 BIOS) and Intel HD 620 on Arch Linux via the Phoronix Test Suite.

Compare your own system(s) to this result file with the Phoronix Test Suite by running the command: phoronix-test-suite benchmark 2107181-IB-PRIMESIEV33
Jump To Table - Results

Statistics

Remove Outliers Before Calculating Averages

Graph Settings

Prefer Vertical Bar Graphs

Table

Show Detailed System Result Table

Run Management

Result
Identifier
View Logs
Performance Per
Dollar
Date
Run
  Test
  Duration
Intel Core i5-7200U
July 18 2021
  7 Minutes


primesieve_testOpenBenchmarking.orgPhoronix Test SuiteIntel Core i5-7200U @ 3.10GHz (2 Cores / 4 Threads)Acer Lynx_SK (V1.19 BIOS)Intel Xeon E3-1200 v6/7th12GB500GB TOSHIBA MQ01ABF0Intel HD 620 (1000MHz)Realtek ALC255Realtek RTL8111/8168/8411 + Intel 7265Arch Linux5.12.15-arch1-1 (x86_64)X Server 1.20.12GCC 11.1.0ext41366x768ProcessorMotherboardChipsetMemoryDiskGraphicsAudioNetworkOSKernelDisplay ServerCompilerFile-SystemScreen ResolutionPrimesieve_test BenchmarksSystem Logs- Transparent Huge Pages: madvise- --disable-libssp --disable-libstdcxx-pch --disable-libunwind-exceptions --disable-werror --enable-__cxa_atexit --enable-cet=auto --enable-checking=release --enable-clocale=gnu --enable-default-pie --enable-default-ssp --enable-gnu-indirect-function --enable-gnu-unique-object --enable-install-libiberty --enable-languages=c,c++,ada,fortran,go,lto,objc,obj-c++,d --enable-lto --enable-multilib --enable-plugin --enable-shared --enable-threads=posix --mandir=/usr/share/man --with-isl --with-linker-hash-style=gnu - Scaling Governor: intel_pstate powersave - CPU Microcode: 0xea- itlb_multihit: KVM: Mitigation of VMX disabled + l1tf: Mitigation of PTE Inversion; VMX: conditional cache flushes SMT vulnerable + mds: Mitigation of Clear buffers; SMT vulnerable + meltdown: Mitigation of PTI + spec_store_bypass: Mitigation of SSB disabled via prctl and seccomp + spectre_v1: Mitigation of usercopy/swapgs barriers and __user pointer sanitization + spectre_v2: Mitigation of Full generic retpoline IBPB: conditional IBRS_FW STIBP: conditional RSB filling + srbds: Mitigation of Microcode + tsx_async_abort: Not affected

Primesieve

Primesieve generates prime numbers using a highly optimized sieve of Eratosthenes implementation. Primesieve benchmarks the CPU's L1/L2 cache performance. Learn more via the OpenBenchmarking.org test page.

OpenBenchmarking.orgSeconds, Fewer Is BetterPrimesieve 7.41e12 Prime Number GenerationIntel Core i5-7200U306090120150SE +/- 1.54, N = 3139.291. (CXX) g++ options: -O3 -lpthread